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february 2011 doc id 10896 rev 3 1/27 1 vn920sp-e high-side driver features ecopack ? : lead free and rohs compliant automotive grade: compliance with aec guidelines very low standby current cmos compatible input proportional load current sense current sense disable thermal shutdown protection and diagnosis undervoltage shutdown overvoltage clamp load current limitation description the vn920sp-e is a monolithic device designed in stmicroelectronics? vipower? m0-3 technology. the vn920sp-e is intended for driving any type of load with one side connected to ground. the active v cc pin voltage clamp protects the device against low energy spikes (see iso7637 transien t compatibility table). active current limitatio n combined with thermal shutdown and automatic restart protects the device against overload. the device integrates an analog current sense output which delivers a current proportional to the load current. the device automatically turns-off in the case where the ground pin becomes disconnected. type r ds(on) i out v cc vn920sp-e 15 m 30 a 36 v table 1. device summary package order codes tube tape and reel powerso-10? vn920sp-e VN920SPTR-E www.st.com
contents vn920sp-e 2/27 doc id 10896 rev 3 contents 1 block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2 electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2.1 absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2.2 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.3 electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 2.4 electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 3 application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 3.1 gnd protection network against reverse battery . . . . . . . . . . . . . . . . . . . 17 3.1.1 solution 1: resistor in the ground line (rgnd only) . . . . . . . . . . . . . . . . 17 3.1.2 solution 2: diode (dgnd) in the ground line . . . . . . . . . . . . . . . . . . . . . 18 3.2 load dump protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 3.3 mcu i/os protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 3.4 powerso-10 maximum demagnetization energy (v cc = 13.5 v) . . . . . . . 19 4 package and pcb thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 4.1 powerso-10 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 5 package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 5.1 ecopack ? packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 5.2 powerso-10 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 5.3 powerso-10 packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 6 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
vn920sp-e list of tables doc id 10896 rev 3 3/27 list of tables table 1. device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 table 2. suggested connections for unused and not connected pins . . . . . . . . . . . . . . . . . . . . . . . . 5 table 3. absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 table 4. thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 table 5. power . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 table 6. switching (v cc = 13 v) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 table 7. logic inputs. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 table 8. v cc output diode. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 table 9. protections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 table 10. current sense . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 table 11. truth table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 table 12. electrical transient requirements on v cc pin (part 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 table 13. electrical transient requirements on v cc pin (part 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 table 14. electrical transient requirements on v cc pin (part 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 table 15. thermal parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 table 16. powerso-10 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 table 17. document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
list of figures vn920sp-e 4/27 doc id 10896 rev 3 list of figures figure 1. block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 figure 2. configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 figure 3. current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 figure 4. switching characte ristics (resistive load r l =1.3 ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 figure 5. i out /i sense versus i out . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 figure 6. waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 figure 7. off-state output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 figure 8. high level input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 figure 9. input clamp voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 figure 10. on-state resistance vs v cc . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 figure 11. on-state resistance vs t case . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 figure 12. input high level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 figure 13. input low level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 figure 14. input hysteresis voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 figure 15. turn-on voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 figure 16. turn-off voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 figure 17. overvoltage shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 figure 18. i lim vs t case . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 figure 19. application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 figure 20. powerso-10 maximum turn-off current versus inductance . . . . . . . . . . . . . . . . . . . . . . . . 19 figure 21. powerso-10 pc board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 figure 22. r thj-amb vs pcb copper area in open box free air condition . . . . . . . . . . . . . . . . . . . . . . . 20 figure 23. powerso-10 thermal impedance junction ambient single pulse . . . . . . . . . . . . . . . . . . . . 21 figure 24. thermal fitting model of a single channel hsd in powerso-10 . . . . . . . . . . . . . . . . . . . . . 21 figure 25. powerso-10 package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 figure 26. powerso-10 suggested pad layout and tube shipment (no suffix) . . . . . . . . . . . . . . . . . . 25 figure 27. powerso-10 tape and reel shipment (suffix ?tr?) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
vn920sp-e block diagram and pin description doc id 10896 rev 3 5/27 1 block diagram and pin description figure 1. block diagram figure 2. configurati on diagram (top view) table 2. suggested connections for unused and not connected pins connection / pin current sense n.c. output input floating x x x to ground through 1 k resistor x through 10k resistor undervoltage overtemperature v cc gnd input output overvoltage current limiter logic driver power clamp v cc clamp v ds limiter detection detection detection k i out current sense 1 2 3 4 5 6 7 8 9 10 11 output output output output ground input c.sense n.c. n.c. v cc n.c. powerso-10
electrical specifications vn920sp-e 6/27 doc id 10896 rev 3 2 electrical specifications figure 3. current and voltage conventions 2.1 absolute maximum ratings stressing the device above the rating listed in ta b l e 3 may cause permanent damage to the device. these are stress ratings only and operation of the device at these or any other conditions above those indicated in the operating sections of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. refer also to th e stmicroelectronics sure progra m and other rele vant quality document. i s i gnd v cc v cc v sense output i out current sense i sense input i in v in v out gnd v f table 3. absolute maximum ratings symbol parame ter value unit v cc dc supply voltage 41 v - v cc reverse dc supply voltage -0.3 v - i gnd dc reverse ground pin current -200 ma i out dc output current internally limited a - i out reverse dc output current -40 a i in dc input current +/-10 ma v csense current sense maximum voltage -3 +15 v v v esd electrostatic discharge (human body model: r = 1.5 k ; c = 100 pf) ? input ? current sense ?output ?v cc 4000 2000 5000 5000 v v v v
vn920sp-e electrical specifications doc id 10896 rev 3 7/27 2.2 thermal data e max maximum switching energy (l = 0.25 mh; r l = 0 ; v bat = 13.5 v; t jstart = 150 c; i l = 45 a) 362 mj p tot power dissipation t c 25 c 96.1 w t j junction operating temperature internally limited c t c case operating temperature -40 to 150 c t stg storage temperature -55 to 150 c table 3. absolute maximum ratings (continued) symbol parame ter value unit table 4. thermal data symbol parameter max. value unit r thj-case thermal resistance junction-case (max) 1.3 c/w r thj-amb thermal resistance junc tion-ambient (max) 51.3 (1) 1. when mounted on fr4 printed circuit board with 0.5 cm 2 of cu (at least 35 m thick). 37 (2) 2. when mounted on fr4 printed circuit board with 6 cm 2 of cu (at least 35 m thick). c/w c/w
electrical specifications vn920sp-e 8/27 doc id 10896 rev 3 2.3 electrical characteristics values specified in this section are for 8 v < v cc < 36 v; -40 c < t j < 150 c, unless otherwise stated. table 5. power symbol parameter test conditions min. typ. max. unit v cc operating supply voltage 5.5 13 36 v v usd undervoltage shutdown 3 4 5.5 v v ov overvoltage shutdown 36 v r on on-state resistance i out = 10 a; t j = 25 c; i out = 10 a; i out = 3 a; v cc = 6 v 15 30 50 m m m v clamp clamp voltage i cc = 20 ma (1) 1. v clamp and v ov are correlated. typical difference is 5 v. 41 48 55 v i s supply current off-state; v cc = 13 v; v in = v out = 0 v off-state; v cc = 13 v; v in = v out = 0 v; t j = 25 c on-state; v cc = 13 v; v in = 5 v; i out = 0 a; r sense = 3.9 k 10 10 25 20 5 a a ma i l(off1) off-state output current v in = v out = 0 v 0 50 a i l(off2) off-state output current v in = 0 v; v out = 3.5 v -75 0 a i l(off3) off-state output current v in = v out = 0 v; v cc = 13 v; t j = 125 c 5a i l(off4) off-state output current v in = v out = 0 v; v cc = 13 v; t j = 25 c 3a table 6. switching (v cc =13v) symbol parameter test conditions min. typ. max. unit t d(on) turn-on delay time r l = 1.3 (see figure 4 )50s t d(off) turn-off delay time r l = 1.3 (see figure 4 )50s dv out /dt (on) turn-on voltage slope r l = 1.3 (see figure 4 ) see figure 15 v/s dv out /dt (off) turn-off voltage slope r l = 1.3 (see figure 4 ) see figure 16 v/s
vn920sp-e electrical specifications doc id 10896 rev 3 9/27 table 7. logic inputs symbol parameter test conditions min. typ. max. unit v il input low level voltage 1.25 v i il low level input current v in = 1.25 v 1 a v ih input high level voltage 3.25 v i ih high level input current v in = 3.25 v 10 a v i(hyst) input hysteresis voltage 0.5 v v icl input clamp voltage i in = 1 ma i in = - 1 ma 66.8 -0.7 8v v table 8. v cc output diode symbol parameter test conditions min. typ. max. unit v f forward on voltage - i out = 5.3 a; t j = 150 c - - 0.6 v table 9. protections (1) 1. to ensure long term reliability under heavy over-load or short circuit conditions , protection and related diagnostic signals must be used together with a pro per software strategy. if the device operates under abnormal conditions this software must limit the duration and number of activation cycles. symbol parameter test conditions min. typ. max. unit t tsd shutdown temperature 150 175 200 c t r reset temperature 135 c t hyst thermal hysteresis 7 15 c i lim dc short circuit current v cc = 13 v 5v < v cc < 36 v 30 45 75 75 a a v demag turn-off output clamp voltage i out = 2 a; v in = 0 v; l = 6 mh v cc - 41 v cc - 48 v cc - 55 v v on output voltage drop limitation i out = 1 a; t j = -40 c...150 c 50 mv
electrical specifications vn920sp-e 10/27 doc id 10896 rev 3 table 10. current sense (1) 1. 9 v v cc 16 v. symbol parameter test cond itions min. typ. max. unit k 1 i out /i sense i out = 1 a; v sense = 0.5 v; t j = -40 c...150 c 3300 4400 6000 dk 1 /k 1 current sense ratio drift i out = 1 a; v sense = 0.5 v; t j = - 40 c...150 c -10 +10 % k 2 i out /i sense i out = 10 a; v sense = 4 v; t j = - 40 c t j = 25 c...150 c 4200 4400 4900 4900 6000 5750 dk 2 /k 2 current sense ratio drift i out = 10 a; v sense = 4 v; t j = -40 c...150 c -8 +8 % k 3 i out /i sense i out = 30 a; v sense = 4 v; t j = -40 c t j = 25 c...150 c 4200 4400 4900 4900 5500 5250 dk 3 /k 3 current sense ratio drift i out = 30 a; v sense = 4 v; t j = -40 c...150 c -6 +6 % i sense0 analog sense leakage current v cc = 6...16 v; i out = 0 a; v sense = 0 v; t j = -40 c...150 c 0 10 a v sense max analog sense output voltage v cc = 5.5 v; i out = 5 a; r sense = 10 k v cc > 8 v, i out = 10 a; r sense = 10 k 2 4 v v v senseh sense voltage in overtemperature condition v cc = 13 v; r sense = 3.9 k 5.5 v r vsenseh analog sense output impedance in overtemperature condition v cc = 13 v; t j > t tsd ; output open 400 t dsense current sense delay response to 9 0 % i sense (2) 2. current sense signal delay after positive input slope. 500 s
vn920sp-e electrical specifications doc id 10896 rev 3 11/27 table 11. truth table conditions input output sense normal operation l h l h 0 nominal overtemperature l h l l 0 v senseh undervoltage l h l l 0 0 overvoltage l h l l 0 0 short circuit to gnd l h h l l l 0 (t j t tsd ) v senseh short circuit to v cc l h h h 0 < nominal negative output voltage clamp l l 0
electrical specifications vn920sp-e 12/27 doc id 10896 rev 3 table 12. electrical transient requirements on v cc pin (part 1) iso t/r 7637/1 test pulse test levels i ii iii iv delays and impedance 1- 25v- 50v - 75 v - 100 v 2 ms, 10 2+ 25v + 50 v + 75v + 100v 0.2 ms, 10 3a - 25 v - 50 v - 100 v - 150 v 0.1 s, 50 3b + 25 v + 50 v + 75 v + 100 v 0.1 s, 50 4- 4v- 5v - 6 v - 7 v 100 ms, 0.01 5 + 26.5 v + 46.5 v + 66.5 v + 86.5 v 400 ms, 2 table 13. electrical transient requirements on v cc pin (part 2) iso t/r 7637/1 test pulse test levels results i ii iii iv 1 cccc 2 cccc 3a cccc 3b cccc 4 cccc 5ceee table 14. electrical transient requirements on v cc pin (part 3) class contents c all functions of the device are performed as designed after exposure to disturbance. e one or more functions of the device is not performed as designed after exposure to disturbance and cannot be returned to proper operation without replacing the device.
vn920sp-e electrical specifications doc id 10896 rev 3 13/27 figure 4. switching characteristics (resistive load r l =1.3 ) figure 5. i out /i sense versus i out v out dv out /dt (on) t r 80% 10% t f dv out /dt (off) i sense t t 90% t d(off) input t 90% t d(on) t dsense 0 2 4 6 8 101214161820222426283032 3000 3500 4000 4500 5000 5500 6000 6500 min.tj=-40c max.tj=-40c min.tj=25...150c max.tj=25...150c typical value i out (a) i out /i sense 6500 6000 5500 5000 4500 4000 3000 3500
electrical specifications vn920sp-e 14/27 doc id 10896 rev 3 figure 6. waveforms sense input normal operation undervoltage v cc v usd v usdhyst input overvoltage v cc sense input sense load current load current load current v ov v ovhyst v cc > v usd short to ground input load current sense load voltage input load voltage sense load current vn920sp-e electrical specifications doc id 10896 rev 3 15/27 2.4 electrical char acteristics curves figure 7. off-state output current figure 8. high level input current figure 9. input clamp voltage figure 10. on-state resistance vs v cc figure 11. on-state resistance vs t case figure 12. input high level -50 -25 0 25 50 75 100 125 150 175 tc (c) 0 1 2 3 4 5 6 7 8 9 il(off1) (ua) -50 -25 0 25 50 75 100 125 150 175 tc (c) 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 iih (ua) vin=3.25v -50 -25 0 25 50 75 100 125 150 175 tc (c) 6 6.2 6.4 6.6 6.8 7 7.2 7.4 7.6 7.8 8 vicl (v) iin=1ma 5 10152025303540 vcc (v) 0 2.5 5 7.5 10 12.5 15 17.5 20 22.5 25 27.5 30 ron (mohm) i out =10a t c = - 40oc t c = 25oc t c = 150oc -25 0 25 50 75 100 125 150 175 tc (oc) 5 7.5 10 12.5 15 17.5 20 22.5 25 27.5 30 ron (mohm) iout=10a vcc=8v; 36v -50 -25 0 25 50 75 100 125 150 175 tc (c) 2 2.2 2.4 2.6 2.8 3 3.2 3.4 3.6 vih (v)
electrical specifications vn920sp-e 16/27 doc id 10896 rev 3 figure 13. input low level figure 14. input hysteresis voltage figure 15. turn-on voltage slope figure 16. turn-off voltage slope figure 17. overvoltage shutdown figure 18. i lim vs t case -50 -25 0 25 50 75 100 125 150 175 tc (c) 1 1.2 1.4 1.6 1.8 2 2.2 2.4 2.6 vil (v) -50 -25 0 25 50 75 100 125 150 175 tc (c) 0.5 0.6 0.7 0.8 0.9 1 1.1 1.2 1.3 1.4 1.5 vhyst (v) -50 -25 0 25 50 75 100 125 150 175 tc (oc) 250 300 350 400 450 500 550 600 650 700 dvout/dt(on) (v/ms) vcc=13v rl=1.3ohm -50 -25 0 25 50 75 100 125 150 175 tc (c) 0 50 100 150 200 250 300 350 400 450 500 550 dvout/dt(off) (v/ms) vcc=13v rl=1.3ohm -50 -25 0 25 50 75 100 125 150 175 tc (c) 30 32 34 36 38 40 42 44 46 48 50 vov (v) -50 -25 0 25 50 75 100 125 150 175 tc (c) 0 10 20 30 40 50 60 70 80 90 100 ilim (a) vcc=13v
vn920sp-e application information doc id 10896 rev 3 17/27 3 application information figure 19. application schematic 3.1 gnd protection network against reverse battery 3.1.1 solution 1: resist or in the ground line (r gnd only) this can be used with any type of load. the following is an indication on how to dimension the r gnd resistor. 1. r gnd 600 mv / (i s(on)max ) 2. r gnd ( -v cc ) / (-i gnd ) where - i gnd is the dc reverse ground pin current and can be found in the absolute maximum rating section of the device?s datasheet. power dissipation in r gnd (when v cc < 0: during reverse battery situations) is: p d = (-v cc ) 2 / r gnd this resistor can be shared amongst several different hsds. please note that the value of this resistor should be calculated with formula (1) where i s(on)max becomes the sum of the maximum on-state currents of the different devices. please note that if the microprocessor ground is not shared by the device ground then the r gnd produces a shift (i s(on)max * r gnd ) in the input thresholds and the status output values. this shift varies depending on how many devices are on in the case of several high-side drivers sharing the same r gnd . if the calculated power dissipation leads to a large resistor or several devices have to share the same resistor then st sugg ests to utilize solution 2 (see section 3.1.2 ). v cc gnd output d gnd r gnd d ld c +5v r prot v gnd input current sense r sense r prot
application information vn920sp-e 18/27 doc id 10896 rev 3 3.1.2 solution 2: diode (d gnd ) in the ground line a resistor (r gnd = 1 k ) should be inserted in parallel to d gnd if the device drives an inductive load. this small signal diode can be safely shared amongst several different hsds. also in this case, the presence of the ground network produces a shift ( 600mv) in the input threshold and in the status output values if the microprocessor ground is not common to the device ground. this shift does not vary if more than one hsd shares the same diode/resistor network. series resistor in input and status lines are also required to prevent that, during battery voltage transient, the current exceeds the absolute maximum rating. safest configuration for unused input and status pin is to leave them unconnected, while unused sense pin has to be connected to ground pin. 3.2 load dump protection d ld is necessary (voltage transient suppresso r ) if the load dump peak voltage exceeds the v cc max dc rating. the same applies if the device is subject to transients on the v cc line that are greater than the ones shown in ta bl e 1 2 . 3.3 mcu i/os protection if a ground protection network is used and negative transient are present on the v cc line, the control pins is pulled negative. st suggests to insert a resistor (r prot ) in line to prevent the microcontroller i/os pins to latch-up. the value of these resistors is a compromise between the leakage current of microcontroller and the current required by the hsd i/os (input levels compatibility) with the latch-up limit of microcontroller i/os. -v ccpeak /i latchup r prot (v oh c -v ih -v gnd ) / i ihmax calculation example: for v ccpeak = -100 v and i latchup 20 ma; v oh c 4.5 v 5k r prot 65 k . recommended values: r prot =10k .
vn920sp-e application information doc id 10896 rev 3 19/27 3.4 powerso-10 maximum de magnetization energy (v cc =13.5v) figure 20. powerso-10 maximum turn-off current versus inductance note: values are generated with r l =0 . in case of repetitive pulses, t jstart (at beginning of each demagnetization) of every pulse must not exceed the temperature specified above for curves b and c. c: t jstart = 125 c repetitive pulse a: t jstart = 150 c single pulse b: t jstart = 100 c repetitive pulse demagnetization demagnetization demagnetization t v in , i l 1 10 100 0,01 0,1 1 10 100 l( mh) i lm ax (a) a b c
package and pcb the rmal data vn920sp-e 20/27 doc id 10896 rev 3 4 package and pcb thermal data 4.1 powerso-10 thermal data figure 21. powerso-10 pc board note: layout condition of r th and z th measurements (pcb fr4 area = 58 mm x 58 mm, pcb thickness = 2 mm, cu thickness = 35 m, copper areas: from minimum pad layout to 8cm 2 ). figure 22. r thj-amb vs pcb copper area in open box free air condition
vn920sp-e package and pcb thermal data doc id 10896 rev 3 21/27 figure 23. powerso-10 thermal impeda nce junction ambient single pulse equation 1 : pulse calculation formula figure 24. thermal fitting model of a single channel hsd in powerso-10 z th r th z thtp 1 ? () + ? = where t p t ? = t_amb c1 r1 r2 c2 r3 c3 r4 c4 r5 c5 r6 c6 pd tj
package and pcb the rmal data vn920sp-e 22/27 doc id 10896 rev 3 table 15. thermal parameters area / island (cm 2 ) footprint 6 r1 (c/w) 0.02 r2 (c/w) 0.1 r3 (c/w) 0.2 r4 (c/w) 0.8 r5 (c/w) 12 r6 (c/w) 37 22 c1 (w.s/c) 0.0015 c2 (w.s/c) 7.00e-03 c3 (w.s/c) 0.015 c4 (w.s/c) 0.3 c5 (w.s/c) 0.75 c6 (w.s/c) 3 5
vn920sp-e package and packing information doc id 10896 rev 3 23/27 5 package and packing information 5.1 ecopack ? packages in order to meet environmental requirements, st offers these devices in different grades of ecopack ? packages, depending on their level of environmental compliance. ecopack ? specifications, grade definitions and product status are available at: www.st.com. ecopack ? is an st trademark. 5.2 powerso-10 mechanical data figure 25. powerso-10 package dimensions
package and packing information vn920sp-e 24/27 doc id 10896 rev 3 table 16. powerso-10 mechanical data dim. millimeters min. typ. max. a 3.35 3.65 a (1) 1. muar only poa p013p. 3.4 3.6 a1 0.00 0.10 b 0.40 0.60 b (1) 0.37 0.53 c 0.35 0.55 c (1) 0.23 0.32 d 9.40 9.60 d1 7.40 7.60 e 9.30 9.50 e2 7.20 7.60 e2 (1) 7.30 7.50 e4 5.90 6.10 e4 (1) 5.90 6.30 e1.27 f 1.25 1.35 f (1) 1.20 1.40 h 13.80 14.40 h (1) 13.85 14.35 h0.50 l 1.20 1.80 l (1) 0.80 1.10 a0 8 (1) 2 8
vn920sp-e package and packing information doc id 10896 rev 3 25/27 5.3 powerso-10 packing information figure 26. powerso-10 suggested pad layout and tube shipment (no suffix) figure 27. powerso-10 tape and reel shipment (suffix ?tr?) base q.ty 600 bulk q.ty 600 a (max) 330 b (min) 1.5 c ( 0.2) 13 f 20.2 g (+ 2 / -0) 24.4 n (min) 60 t (max) 30.4 tape dimensions according to electronic industries association (eia) standard 481 rev. a, feb. 1986 all dimensions are in mm. tape width w 24 tape hole spacing p0 ( 0.1) 4 component spacing p 24 hole diameter d ( 0.1/-0) 1.5 hole diameter d1 (min) 1.5 hole position f ( 0.05) 11.5 compartment depth k (max) 6.5 hole spacing p1 ( 0.1) 2 top cover tape end start no components no components components 500mm min 500mm min empty components pockets saled with cover tape. user direction of feed reel dimensions
revision history vn920sp-e 26/27 doc id 10896 rev 3 6 revision history table 17. document revision history date revision changes 01-oct-2004 1 initial release. 17-may-2010 2 updated features list. 07-feb-2011 3 updated table 6: switching (v cc =13v)
vn920sp-e doc id 10896 rev 3 27/27 please read carefully: information in this document is provided solely in connection with st products. stmicroelectronics nv and its subsidiaries (?st ?) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described he rein at any time, without notice. all st products are sold pursuant to st?s terms and conditions of sale. purchasers are solely responsible for the choice, selection and use of the st products and services described herein, and st as sumes no liability whatsoever relating to the choice, selection or use of the st products and services described herein. no license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. i f any part of this document refers to any third party products or services it shall not be deemed a license grant by st for the use of such third party products or services, or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoev er of such third party products or services or any intellectual property contained therein. unless otherwise set forth in st?s terms and conditions of sale st disclaims any express or implied warranty with respect to the use and/or sale of st products including without limitation implied warranties of merchantability, fitness for a parti cular purpose (and their equivalents under the laws of any jurisdiction), or infringement of any patent, copyright or other intellectual property right. unless expressly approved in writing by an authorized st representative, st products are not recommended, authorized or warranted for use in military , air craft, space, life saving, or life sustaining applications, nor in products or systems where failure or malfunction may result in personal injury, death, or severe property or environmental damage. st products which are not specified as "automotive grade" may only be used in automotive applications at user?s own risk. resale of st products with provisions different from the statements and/or technical features set forth in this document shall immediately void any warranty granted by st for the st product or service described herein and shall not create or extend in any manner whatsoev er, any liability of st. st and the st logo are trademarks or registered trademarks of st in various countries. information in this document supersedes and replaces all information previously supplied. the st logo is a registered trademark of stmicroelectronics. all other names are the property of their respective owners. ? 2011 stmicroelectronics - all rights reserved stmicroelectronics group of companies australia - belgium - brazil - canada - china - czech republic - finland - france - germany - hong kong - india - israel - ital y - japan - malaysia - malta - morocco - philippines - singapore - spain - sweden - switzerland - united kingdom - united states of america www.st.com

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